8085 and 8086 architecture notes — Unit 1

A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic device that reads binary instructions from a storage device called memory, accepts binary data as input, processes data according to those instructions, and provides results as output.

⇒1.1 Basic Components

• ALU (Arithmetic Logic Unit): Performs computing functions (addition, subtraction, AND, OR).
• Registers: Small, fast storage locations within the CPU used to hold temporary data and addresses.
• Control Unit: Generates timing and control signals to manage the flow of data between the CPU and memory/peripherals.

The Intel 8085 is an 8-bit microprocessor introduced in 1976. It requires a +5V power supply and operates at a 3 MHz clock frequency.

⇒2.1 Key Specifications

• Data Bus: 8-bit bidirectional data bus. It can process 8 bits of data simultaneously.
• Address Bus: 16-bit unidirectional address bus. This allows it to address `2^16 = 65,536` memory locations (64 KB of memory).
• Pins: It is a 40-pin Dual Inline Package (DIP) IC.

The 8085 has several programmable registers used by assembly language programmers.

⇒3.1 General Purpose Registers

There are six 8-bit general-purpose registers: B, C, D, E, H, and L. They can be used individually to store 8-bit data, or they can be combined into 16-bit register pairs (BC, DE, HL) to store 16-bit data or memory addresses.

⇒3.2 The Accumulator (Register A)

An 8-bit register that is part of the ALU. It is the most important register. During any arithmetic or logical operation, one of the operands must be in the Accumulator, and the final result is always stored back into the Accumulator.

⇒4.1 Program Counter (PC)

A 16-bit register that holds the memory address of the next instruction to be executed. The CPU uses this to sequence the execution of instructions. It automatically increments after fetching an instruction.

⇒4.2 Stack Pointer (SP)

A 16-bit register that points to a specific area in RAM called the Stack. The stack is used for temporary storage of data or memory addresses (LIFO structure), primarily during interrupts and subroutines.

⇒4.3 Flag Register

An 8-bit register containing 5 flip-flops that indicate the status of the result generated by the ALU: Sign (S), Zero (Z), Auxiliary Carry (AC), Parity (P), and Carry (CY).

A bus is a group of conducting wires used to transmit signals.

⇒5.1 Address/Data Multiplexing

To save physical pins on the IC, the lower 8 bits of the Address bus (A0-A7) and the 8 bits of the Data bus (D0-D7) are combined into a single multiplexed bus called AD0-AD7.

During the first clock cycle of a machine cycle, this bus acts as the address bus to send out the memory location. The CPU sends an Address Latch Enable (ALE) signal to latch this address externally. In subsequent clock cycles, the same pins act as the bidirectional data bus.

The Intel 8086 is a 16-bit microprocessor introduced in 1978. It represents a massive upgrade over the 8085 and forms the foundation of the modern x86 architecture used in today's PCs.

⇒6.1 Key Specifications

• Data Bus: 16-bit. It can process 16 bits of data simultaneously.
• Address Bus: 20-bit. This massive upgrade allows it to address `2^20 = 1,048,576` memory locations (1 Megabyte of RAM).
• Modes: It can operate in Minimum mode (single processor) or Maximum mode (multiprocessor environment).

Unlike the 8085 which executed one step at a time, the 8086 architecture is divided into two separate, independent functional units that operate simultaneously to increase speed. This is a primitive form of Pipelining.

⇒7.1 Bus Interface Unit (BIU)

Handles all data and address transfers on the buses for the execution unit. It fetches instructions from memory, reads/writes data, and calculates physical addresses.

⇒7.2 Execution Unit (EU)

Tells the BIU where to fetch instructions or data from, decodes instructions, and executes them in the ALU.

The key to the 8086's speed is the 6-byte Instruction Queue located in the BIU.

⇒8.1 Pipelining Operation

While the Execution Unit (EU) is busy decoding and executing the current instruction, the BIU uses the system buses (which would otherwise be idle) to pre-fetch the next 6 bytes of instructions from memory and store them in the queue.

When the EU finishes its current instruction, it doesn't have to wait for the next instruction to be fetched from slow RAM; it instantly grabs it from the high-speed queue. This overlap of fetch and execute cycles vastly improves processing speed.

The 8086 has four 16-bit general-purpose registers: AX, BX, CX, and DX. They can also be accessed as eight 8-bit registers (AH, AL, BH, BL, etc., where H is the high byte and L is the low byte).

⇒9.1 Specific Functions

• AX (Accumulator): Used for 16-bit arithmetic, logic, and I/O operations.
• BX (Base Register): Used as a base pointer for memory access.
• CX (Count Register): Used as a counter in loop and string operations.
• DX (Data Register): Used in multiplication/division and I/O operations.

These 16-bit registers are primarily used to store offset addresses (offsets from a base segment) to access data in memory.

⇒10.1 Pointer Registers

• SP (Stack Pointer): Points to the top of the stack.
• BP (Base Pointer): Primarily used to access parameters passed via the stack.

⇒10.2 Index Registers

• SI (Source Index): Used to point to the source string in string manipulation operations.
• DI (Destination Index): Used to point to the destination string in string manipulation operations.

The 8086 has a 20-bit address bus, allowing it to access 1 MB of memory. However, all internal registers (like the PC and BX) are only 16-bit. A 16-bit register can only address 64 KB.

⇒11.1 The Solution: Segments

The 8086 divides the 1 MB memory into logical segments of up to 64 KB each. To generate a 20-bit physical address, the processor combines a 16-bit Segment Address (which defines where the 64 KB block starts in the 1 MB space) with a 16-bit Offset Address (the location within that 64 KB block).

The BIU contains four 16-bit Segment Registers to hold the starting addresses of four active memory segments at any given time.

• CS (Code Segment): Holds the base address of the memory segment where the program instructions (code) are stored. The offset is provided by the Instruction Pointer (IP).
• DS (Data Segment): Holds the base address for program data (variables). Offsets are usually in BX, SI, or DI.
• SS (Stack Segment): Holds the base address of the stack. Offsets are in SP or BP.
• ES (Extra Segment): An additional data segment, primarily used as the destination for string operations. Offset is in DI.

How does the BIU turn two 16-bit numbers into a 20-bit physical address on the hardware bus?

⇒13.1 The Calculation

The hardware automatically shifts the 16-bit Segment Address to the left by 4 bits (which is equivalent to adding a hexadecimal `0` to the end, or multiplying by 16 in decimal). This creates a 20-bit base address. It then mathematically adds the 16-bit Offset Address to this base.

Example: If CS contains `1000H` and IP (offset) contains `2050H`.

• 1. Shift CS left by 4 bits: `1000H` -> `10000H`
• 2. Add offset: `10000H + 2050H`
• 3. 20-bit Physical Address generated on the bus: `12050H`.

The 8086 has a 16-bit flag register. It contains 9 active flags divided into two categories.

⇒14.1 Status Flags (Condition Codes)

Automatically set by the ALU after an operation: Carry (CF), Parity (PF), Auxiliary Carry (AF), Zero (ZF), Sign (SF), and Overflow (OF). OF is new in 8086, indicating signed arithmetic overflow.

⇒14.2 Control Flags

Programmer-controlled flags that alter the behavior of the processor.

• Trap Flag (TF): Used for single-step debugging.
• Interrupt Enable Flag (IF): Controls whether external interrupts are recognized.
• Direction Flag (DF): Controls the direction of string operations (auto-increment or auto-decrement).