Register transfer, micro-operations and control unit design notes — Unit 2

A digital system is best described by the registers it contains and the operations performed on the data stored in them. We use a symbolic notation called Register Transfer Language (RTL) to describe this.

⇒1.1 Basic Notation

• Registers are denoted by capital letters (e.g., $MAR, PC, R1$).
• Bits within a register are denoted by parentheses. e.g., $R1(0-7)$ means the lower byte of a 16-bit register.
• Data transfer is denoted by an arrow: $R2 \leftarrow R1$ (Copy contents of R1 into R2. R1 remains unchanged).

⇒1.2 Conditional Transfer

Transfers only happen when a specific control signal is high. We denote this as $P: R2 \leftarrow R1$. This means "If control signal $P = 1$, then load R1 into R2 on the next clock edge."

A CPU has many registers. Connecting every register to every other register with dedicated wires is impossible ($O(n^2)$ wires). Instead, we use a Common Bus system.

⇒2.1 The Common Bus

A bus is a shared set of wires. At any given clock cycle, exactly one register places data onto the bus, and one or more registers read data from the bus.

RTL representation of using a bus:
$BUS \leftarrow R1$
$R2 \leftarrow BUS$
This is usually abbreviated simply as $R2 \leftarrow R1$, implying the bus is used.

⇒2.2 Memory Transfers

Memory is an array of registers. We access it using the Memory Address Register (MAR) and Memory Data Register (MDR).

• Read: $MDR \leftarrow M[MAR]$ (Copy data from the memory location specified by MAR into MDR).
• Write: $M[MAR] \leftarrow MDR$ (Copy data from MDR into the memory location specified by MAR).

How do we ensure only one register writes to the shared bus at a time? We use hardware multiplexers or tri-state buffers.

⇒3.1 Multiplexer-based Bus

To build a common bus for four registers (A, B, C, D), we use Multiplexers. The output of all 4 registers feeds into the MUX. Selection lines ($S_1, S_0$) generated by the Control Unit choose which register's data passes through the MUX and onto the Bus.

⇒3.2 Tri-State Buffer Bus

A more common and scalable approach. A tri-state buffer is a logic gate with three states: 0, 1, and High-Impedance (Hi-Z).

• If Enable = 1, it acts like a normal wire.
• If Enable = 0, it enters the Hi-Z state, acting like an open switch (physically disconnecting the register from the bus wire).

The Control Unit ensures that exactly ONE tri-state buffer is enabled at any given time.

A macro-instruction (like "Add two numbers from memory") takes multiple clock cycles. The elementary operations executed during a single clock cycle are called Micro-operations.

There are four main types of micro-operations:

• 1. Register Transfer: Moving data without changing it. ($R2 \leftarrow R1$)
• 2. Arithmetic: Performing math. ($R3 \leftarrow R1 + R2$)
• 3. Logic: Bitwise manipulation. ($R3 \leftarrow R1 \oplus R2$)
• 4. Shift: Shifting bits. ($R1 \leftarrow \text{shl } R1$)

The hardware unit inside the CPU that performs Arithmetic, Logic, and Shift micro-operations is the ALU (Arithmetic Logic Unit).

Standard arithmetic operations executed in a single cycle.

• Addition: $R3 \leftarrow R1 + R2$
• Subtraction: $R3 \leftarrow R1 - R2$ (Implemented as $R3 \leftarrow R1 + R2' + 1$)
• Increment: $R1 \leftarrow R1 + 1$
• Decrement: $R1 \leftarrow R1 - 1$

Note: Multiplication and Division are usually NOT micro-operations. They are macro-operations implemented via a sequence of shift and add/subtract micro-operations over many clock cycles.

⇒5.1 Hardware Implementation

An Arithmetic Circuit is built using a parallel adder and multiplexers to manipulate the $B$ input (e.g., passing $B$, passing $B'$, or passing 0) and the Carry-in to achieve all the above operations with one circuit.

Logic micro-operations treat each bit of a register as a separate Boolean variable and operate on corresponding bits of two registers simultaneously (Bitwise operations).

• AND ($R1 \wedge R2$): Used for Masking (Clearing specific bits). ANDing a bit with 0 clears it. ANDing with 1 leaves it unchanged.
• OR ($R1 \vee R2$): Used for Setting specific bits. ORing a bit with 1 sets it to 1. ORing with 0 leaves it unchanged.
• XOR ($R1 \oplus R2$): Used for Complementing specific bits. XORing a bit with 1 flips it. XORing a register with itself clears it to 0 ($R1 \oplus R1 = 0$).
• NOT ($R1'$): 1's complement of the register.

These are heavily used in operating systems for flag manipulation and bit-packing.

Used for serial transfer of data, bit manipulation, and fast multiplication/division by 2.

⇒7.1 Types of Shifts

• Logical Shift: Shifts bits left or right. The empty space created is always filled with a `0`. Used for unsigned numbers. (e.g., $R1 \leftarrow \text{shl } R1$)
• Circular Shift (Rotate): Shifts bits, but the bit that falls off one end is fed back into the empty space on the other end. No data is lost. (e.g., $R1 \leftarrow \text{cir } R1$)
• Arithmetic Shift: Shifts signed binary numbers.
  - Arithmetic Shift Left (ASL): Fills with 0. Can cause overflow if the sign bit changes.
  - Arithmetic Shift Right (ASR): The empty MSB is filled with a copy of the original sign bit. This preserves the negative/positive status of the number (equivalent to integer division by 2 for signed numbers).

The ALU does the math, the registers store the data, and the bus connects them. But who tells the MUXes which register to select? Who tells the ALU whether to ADD or XOR? The Control Unit.

The Control Unit reads the current instruction from the Instruction Register (IR), decodes it, and fires a precise sequence of binary electrical signals (Control Signals) to coordinate the entire CPU.

⇒8.1 Design Approaches

There are two drastically different ways to build a Control Unit:

• Hardwired Control
• Microprogrammed Control

The control signals are generated by a massive, complex combinational logic circuit made of physical AND, OR, and NOT gates.

⇒9.1 How it works

Inputs to the CU logic:
1. Instruction Decoder outputs (identifying the opcode).
2. A Sequence Counter (a timer that ticks through cycles $T_0, T_1, T_2 \dots$).
3. Status Flags (from the ALU).

The logic gates evaluate these inputs. E.g., The equation for the "Enable Register A Load" wire might be: $Load_A = D_3 T_4 + D_5 T_2$. (Meaning: Fire this wire if it's Instruction 3 at time 4, OR Instruction 5 at time 2).

⇒9.2 Pros and Cons

• Pros: Extremely fast. Pure hardware executes at the speed of electricity.
• Cons: Inflexible. If you want to add a new instruction to the CPU, you have to physically redesign and remanufacture the silicon chip. Very difficult to debug.

Used heavily in RISC processors where instructions are simple.

Instead of complex logic gates, the control signals are generated by reading "Microinstructions" from a special, hidden memory chip called the Control Memory (ROM).

⇒10.1 The Concept

A machine instruction (like `ADD`) is treated as a subroutine pointer. The Control Unit looks up the address of `ADD` in the Control Memory. Stored there is a sequence of Microinstructions (a micro-program).

Each bit of a Microinstruction directly corresponds to a control wire in the CPU. If the bit is 1, the wire is fired. The CU simply fetches these microinstructions one by one and executes them.

⇒10.2 Architecture Components

• Control Memory: The ROM storing the micro-programs.
• Control Address Register (CAR): Holds the address of the next microinstruction.
• Control Data Register (CDR) / Pipeline Register: Holds the microinstruction currently being executed.
• Next Address Generator: Logic to determine the next CAR value (handles branching within the micro-program).

⇒11.1 Pros and Cons

• Pros: Highly flexible. To add a new CPU instruction, you just write a new micro-program and burn it into the ROM. No silicon redesign needed. Easier to design complex instructions (CISC).
• Cons: Slower. Reading from the Control ROM adds an extra memory access delay to every single CPU cycle.

⇒11.2 Horizontal vs. Vertical Microinstructions

• Horizontal: 1 bit per control signal. Extremely long words (e.g., 64 bits). Fast, highly parallel (can fire many signals at once), but wastes ROM space (many zeros).
• Vertical: Control signals are encoded into fields (e.g., a 3-bit field dictates 1 of 8 ALU operations). Shorter words (e.g., 16 bits). Saves ROM space, but requires a hardware decoder at the output, making it slightly slower.

Maurice Wilkes proposed the first microprogrammed control unit in 1951.

⇒12.1 Wilkes' Design

Wilkes conceptualized the control memory as a diode matrix (a primitive ROM).

• The matrix has horizontal lines representing microinstructions and vertical lines representing control signals and next-address bits.
• A diode placed at an intersection acts as a '1'. No diode acts as a '0'.
• When a horizontal line is activated, current flows through the diodes, activating the corresponding vertical control lines.

The address of the next horizontal line to activate is partially generated by the current line, and partially determined by external condition flags (allowing conditional branching in the micro-program).

Let's dissect a typical Vertical Microinstruction format.

A 20-bit microinstruction might be divided into fields:

• F1 (3 bits), F2 (3 bits), F3 (3 bits): Micro-operation fields. Each 3-bit field is decoded into 8 lines. (e.g., F1=001 might mean $A \leftarrow A+B$, F2=100 might mean $MDR \leftarrow M[MAR]$).
• CD (2 bits): Condition for branching (e.g., 00=Always, 01=If Zero flag, 10=If Sign flag).
• BR (2 bits): Branch field (e.g., 00=Jump, 01=Call subroutine, 10=Return).
• AD (7 bits): The Address field. Contains the jump address in the Control Memory if the branch condition is met.

This highly structured format allows complex CPU behaviors to be programmed exactly like software.

Unit 2 explores the "nervous system" of the CPU.

⇒14.1 University Exam Checklist

• Write the RTL for a memory read and a memory write operation.
• Design a 4-line common bus system using 4x1 Multiplexers.
• Explain the difference between Logical, Circular, and Arithmetic shifts.
• Compare Hardwired and Microprogrammed Control Units. Which one is used in RISC architectures and why?
• Explain the difference between Horizontal and Vertical microprogramming.
• Draw the block diagram of a Microprogrammed Control Unit (showing CAR, Control Memory, and Next Address logic).

⇒14.2 Systems Interview Focus

• Understanding that x86 (Intel/AMD) processors are CISC architectures that rely heavily on complex Microprogrammed Control Units to translate legacy x86 instructions into simpler internal micro-operations on the fly.